Master's Degree or foreign equivalent in Electrical Engineering, Computer Engineering, Electronics Engineering, or related field. Education and/or experience must include: Designing and analyzing high-speed analog and mixed-signal building blocks including PLL, LDO, ADC, DAC and Phase-Interpolator. Leveraging end-to-end SERDES systems including TX/RX design and channel characteristics and equalization techniques. Utilizing RTL/Verilog modeling to develop models for mixed-signal blocks to help with system level design verification.
Modeling MATLAB for performance analysis of SERDES (jitter tolerance, equalization analysis). Leveraging testing equipment including spectrum analyzers, oscilloscope, and signal generators for post-silicon validation and testing. Utilizing layout techniques for analog and high-speed circuits including matching, noise to ensure the post-layout performance. Leveraging signal processing for design and analysis including filtering, equalization, and spectral analysis.
Using Python and Shell scripting to automate design simulations and for data analysis. Utilizing design validation tools including EMIR, static timing analysis, and DFT to ensure design robustness and manufacturability.