FE Engineer

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work with leads and architecture teams to define the design microarchitecture. Develop RTL design of one or more blocks following established design guidelines based on microarchitecture spec. Own all aspects of RTL development design. Work and collaborate with other designers in the group to deliver results. Integrate common/shared IP blocks and optimize memories/hard macros required for the block.

Complete front-end synthesis/STA to ensure timing for the block is met. Optimize power/performance. Collaborate with multi-disciplinary groups to make sure designs are delivered on time and of the highest quality by incorporating proper checks at every stage of the design process. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role.