Hardware Test Engineer
DensityAI, Mountain View, CA +1
The role
Own the test that proves our AI accelerator hardware works — from the packaged units, to the boards they sit on, to the systems they ship in. You'll develop the test setups, test hardware, and coverage/yield/throughput that let us catch problems early and ship at volume. You'll sit at the seam between silicon/packaging and the systems our accelerators run in, and own the test strategy that spans package level, board level, and — increasingly — full system level.
What you will do
- Develop and run package-level test — socket-based bring-up and validation of packaged units: power-up, interface/interconnect continuity, and functional/parametric checks against spec (board↔package interface, not ATE silicon device test)
- Develop and run board-level test — functional, structural (boundary scan/JTAG), in-circuit, and bring-up validation for accelerator boards and system hardware
- Build out system-level test — bring up and validate assembled accelerator systems against spec, including functional, stress, and burn-in flows