Architect and lead system-level Signal Integrity Power Integrity design, simulation, and validation for advanced hardware products, including pre-layout and post-layout analysis of high-speed interfaces and power distribution networks (PDN) Develop, implement, and continuously improve SIPI methodologies, standards, and guidelines for design, simulation, and validation Drive SIPI technical strategy and influence system architecture, design trade-offs, and manufacturing processes across multiple projects and teams Lead cross-functional collaboration with electrical, silicon, packaging, PCB layout, firmware, mechanical, software, manufacturing, and external partners to deliver integrated solutions Guide vendors and suppliers in developing and validating high-speed signaling solutions, including interconnects, substrates, and compliance testing Own SIPI validation strategy, including advanced engineering test plans, lab measurements, and compliance for high-speed interfaces (e.g., PCIe, DDR, MIPI, USB, Ethernet, etc.) Troubleshoot and resolve complex SIPI-related design issues using simulation and lab data; drive failure analysis, root cause investigations, and design of experiments Mentor and develop engineers, foster knowledge sharing, and contribute to organizational initiatives and process improvements Communicate technical findings, recommendations, and reports clearly to cross-functional stakeholders and leadership Stay current with industry trends, emerging technologies, and best practices in SIPI, and proactively assess and integrate new approaches to maintain Meta’s leadership in hardware engineering