Sr. Staff Power Performance Architect

d-Matrix is looking for a Senior Staff Power Performance Architect to own pre-silicon power estimation across our next-generation AI accelerators. In this role, you will drive both RTL-level and physical-design-level power estimation, and build an architectural power estimation tool that models power from system configuration and die-level metrics for AI workloads. You will partner closely with front-end architects, DV engineers, and backend design teams to identify power activity windows, define performance monitoring requirements, and translate that analysis into hardware capability improvements and die-level design changes.

This role also contributes directly to micro-architecture and RTL design, verification, and silicon bring-up, making it central to how d-Matrix balances performance and power efficiency at the silicon level.