- Bachelor's in engineering with a minimum of 10 years of experience.
- Experience with the IC/ASIC development flow from concept through production release of silicon.
- Experience in defining and using advanced front-end design flows from system simulation through RTL implementation, verification, synthesis, and interfacing with a backend team.
- Experience in high-speed analog block integration into digital logic.
- The candidate must have a well-developed ability to analyze specifications at the architecture and micro-architecture level to identify design improvements.
- Excellent program management, people management, and project tracking skills.
- Experience with customer communications and marketing/sales interactions.
- Experience with ASIC verification using random constraint coverage driven verification methodology like UVM, VMM, OVM or SPECMAN.
- Fluency with Verilog and System Verilog, experience with synthesis, formal verification, and STA flow set up. Experience with low power design flows highly desirable.
- Experience in DSP block implementation highly desirable.
CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.
Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.