- Master's degree or higher in Electrical Engineer or other related field (or equivalent experience).
- SRAM design experience with a strong background in digital circuit design, layout, and validation on advanced FinFET and nanosheet processes.
- Design experience in single-port, dual-port, or register file SRAM-based macros required, including complex circuits such as self-timed logic and sense-amplifiers.
- Familiarity with Cadence Virtuoso schematic and layout capture tools
- Shown dewlivery of silicon IP into production.
Ways to stand out from the crowd
- Shown written, verbal, and presentation skills.
- Skills in AI coding and analysis tools such as Codex and Claude Code.
- Silicon testing/debug experience.
NVIDIA is widely considered one of the technology world's most desirable employers. We have some of the most forward-thinking and talented people in the world working for us. If you're creative, curious, and eager to own something that matters at scale — we want to hear from you.
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are: 116,000 USD – 189,750 USD for Level 2; and 136,000 USD – 218,500 USD for Level 3.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.