- Ph.D. or Master’s degree or equivalent experience in Computer Science, Electrical Engineering, Computer Engineering, or a related quantitative field.
- Minimum of 15 years of professional R&D experience specifically building commercial or advanced academic Electronic Design Automation (EDA) hardware verification tools.
- Deep mathematical and hands-on understanding of formal methods, including bounded model checking (BMC), unbounded model checking (PDR/IC3), abstract interpretation, and theorem proving.
- Expert-level proficiency in C/C++ (Modern C++17/20) passionate about high-performance data structures, memory optimization, and multi-threading.
- Proven experience building or researching Agentic AI pipelines, multi-agent frameworks (e.g., LangChain, AutoGen, CrewAI), tool-use execution, and prompt-engineering tailored to structured code or hardware descriptions.
- Experience with RTL languages (System Verilog, VHDL, Verilog) combined with solid understanding of System Verilog Assertions (SVA).
Ways to stand out from the crowd
To distinguish yourself, demonstrate a flawless track record of successfully deploying world-class EDA solutions in high-stakes environments. Showcase any ambitious projects where you have carefully established innovative answers to complex verification challenges. Highlight experiences that reflect your ability to compete at the highest level and deliver outstanding results.
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 232,000 USD – 368,000 USD.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.