Physical Verification Engineer
NVIDIA, Israel, Tel Aviv +1
The role
NVIDIA is seeking a Physical Verification Engineer to help ensure our ASIC and SoC designs are clean, correct, and ready for tapeout. This role focuses on physical verification quality across layout data, connectivity, and manufacturing rule compliance. You will work closely with physical design, custom layout, and methodology teams to run verification flows, debug issues, and improve signoff robustness. This is an excellent opportunity for an engineer who enjoys detailed analysis and high-impact signoff work.
What you will do
- Run and analyze physical verification checks such as DRC, LVS, and other tapeout-quality signoff checks.
- Debug physical verification violations and partner with design teams to drive clean closure.
- Review layout, netlist, and runset interactions to identify root causes and recommend fixes.
- Support full-chip and block-level verification readiness across implementation milestones.