Compiler Engineer - Algorithmic Workloads Compilation
Mythic, Palo Alto, CA +3
The role
Help push the boundaries of what can run on our accelerator. You’ll design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow—loops, branches, and iterative methods—going beyond static neural networks. Working side by side with hardware engineers, you’ll influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. The result: a compiler that makes complex algorithms practical to deploy while staying seamless for developers.
What you will do
- Extend compiler IRs to represent algorithms not easily captured in DNN graphs including control flow and iterative computation
- Develop compilation strategies that unify analog compute with digital subsystems while maintaining performance and correctness
- Prototype and optimize algorithms with irregular or dynamic control flow in compiler IRs, applying techniques such as vectorization, predication, and scheduling