EMIR Engineer
Advanced Micro Devices, Inc, Santa Clara, California
The role
As senior EMIR CAD member, you will be responsible for Gatelevel EMIR, the development and maintenance of the world-class EMIR/Voltus flows. You will collaborate with our internal experts and EDA vendors to evaluate new tool features and collect best practices and integrate them into a software designed flow for consistency, efficiency, and ease-of-use. You will provide tools/flows support to the global IP & SoC and 3DIC Stacked Die design teams and work with EDA vendors to resolve tool issues.
THE PERSON: You have excellent communication and organizational skills, technically strong in EMIR/Voltus with knowledge in Physical Design and Advanced Packaging. Exceptional at scripting skills in Perl, Tcl and Python. KEY RESPONSIBILITIES: Collaborate with EMIR CAD team to develop and maintain world-class EMIR flows using state-of-the-art EDA tools (Voltus, Redhawk_SC) Provide tools/flows support to the global IP/SoC/3DIC design teams and enable the flow to support new tech nodes Collaborate with internal EMIR experts & EDA vendors to drive continuous flow and methodologies improvements Work with EDA vendors to resolve tool issues and bugs Manage tool versions regression and qualification for deployment PREFERRED EXPERIENCE: Extensive industrial experience in VLS/silicon design Prior experience working with EDA vendors, particularly in Gatelevel EMIR domain (with Voltus/Redhawk_SC experience) Solid background in VLSI and CMOS fundamentals and electrical engineering knowledge Strong analytic and problem-solving skills Excellent communication skills ACADEMIC CREDENTAILS: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.