- Bachelor's degree in Electrical Engineering or related degree with 8+ years relevant experience or Master's degree in Electrical Engineering or related degree with 6+ years related experience
- 6+ years of experience in writing and debugging complex test benches
- Must have deep understanding of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage.
- Must have proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM
- Should have exceptionally good command of Object-Oriented Programming principles.
- A good understanding of a complex protocol like PCIe or other multi-layered protocol
- Capability to work independently and deliver.
- Knowledge of PCI Express protocol is desired
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.