Principal Physical Design Engineer, STA

At Broadcom, we shape the future of global technology by delivering world-class custom silicon and infrastructure solutions that power the largest hyperscale data centers and advanced AI platforms on earth. The ASIC Products Division is seeking a talented Full-Chip Static Timing Analysis (STA) Engineer to join our elite engineering team.

In this highly visible role, you will be responsible for ensuring that our high-performance, next-generation ASICs meet their aggressive performance targets and tight timing requirements across all operating conditions. This position is tailored for engineers eager to leverage next-generation EDA flows, employing AI-driven automation and machine learning to maximize compute infrastructure efficiency and accelerate timing closure. If you thrive on solving complex timing puzzles at advanced sub-nodes, managing multi-mode multi-corner (MMMC) scenarios at massive scale, and pioneering AI-assisted methodologies, this is where you belong.