Senior Physical Design Engineer
Broadcom, USA-CA San Jose Innovation Drive
What you will do
Full-Flow Implementation: Lead block-level and top-level implementation from floorplanning to GDSII stream-out using Cadence Innovus
Advanced Node Execution: Drive floorplanning, placement, CTS, routing, and timing/power optimization on advanced technology nodes (5nm, 3nm, 2nm) using multi-patterning and complex metal stacks.
Timing & Power Closure: Perform multi-corner multi-mode (MCMM) static timing analysis (STA), signal integrity (SI) optimization, and power grid optimization (static/dynamic IR-drop, EM) for signoff using PrimeTime, Voltus, or RedHawk.