ASIC Implementation Engineer PD
Broadcom, USA-CA San Jose Innovation Drive
The role
Broadcom is searching for an ASIC top level floorplan Physical Design Engineer to join the Asic Products Division. This position involves working with the latest technology to continue driving next generation Artificial Intelligence and PCIe Switch Products. More specifically, this position will require in-depth knowledge and expertise in all Physical Design aspects of taking RTL to silicon tape-out.
What you will do
- Own chip floor planning, partition creation, clock tree and delivery of top level partitions
- Resolve physical design issues related to chip integration and assembly
- Manage all cross functional interactions related to top level floorplanning, I/O and bump planning with package team
- Develop and improve floorplan implementation methodologies using both industry and internal tools
- Perform technical evaluations of vendors and IP, providing recommendations and assessments to meet design specification