- BSEE (MSEE preferred) or equivalent experience.
- 8+ years of experience in large VLSI physical design implementation on 5nm, 4nm and 3nm technology.
- Your successful track record of delivering designs to production is a requirement.
- Shown experience in the following areas: Power, Performance and Area improvement Initiatives is a plus.
- Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR-RC/ICV),Cadence (Innovus, Tempus, SeaHawk ) and Mentor Graphics.
- Deep understanding of custom macro blocks such as RAMs, CAMs, high-speed IO drivers, PLLs.
- Confirmed prior experience in timing closure, clock/power distribution and analysis, RC extraction and correlation, place/ route and tapeout solutions.
- To be successful you should possess strong analytical and debugging skills required.
- Proficiency using Python, Perl, Tcl, Make scripting is helpful.
NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are: 168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.