Required Technical Skills
Transistor Fundamentals: Expert knowledge of MOSFET/BJT device physics, small-signal modeling, and aging effects.
EDA Tool Proficiency: Mastery of Cadence (Spectre/Virtuoso), Mentor Graphics, or Synopsys tool suites.
Signal Integrity: Deep understanding of thermal noise, jitter, crosstalk, and power supply rejection ratio (PSRR).
Mixed-Signal Flow: Familiarity with Verilog-A or Verilog-AMS for behavioral modeling of analog blocks.
Qualifications
Education: BS, MS, or PhD in Electrical Engineering (EE) with a concentration in Analog IC Design.
Experience: 3 - 7 years of experience in analog design (FinFET or planar CMOS nodes).
Analytical Mindset: Strong mathematical background for analyzing feedback systems and stability.
Job Type
Experienced Hire
Shift
Shift 1 (India)
Primary Location
India, Bangalore
Additional Locations
Posting Statement
Position of Trust N/A
Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
- ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.