Senior Principal Engineer, SerDes Transmitter

Upscale, US - Santa Clara, CA

The role

We are building a world-class SerDes engineering team to enable next-generation connectivity for AI data centers and high-performance computing.

We are seeking a highly accomplished Senior Principal Engineer to lead the design and development of advanced SerDes transmitter circuits. This role will drive key transmitter technologies spanning clock generation and distribution, high-speed DACs, output drivers, and innovative circuit techniques for extending bandwidth and improving power efficiency.

All jobs

Senior Principal Engineer, SerDes Transmitter

Upscale, US - Santa Clara, CA

Posted pay

$261K–$297K

a year

Compared with similar jobs

This base pay is near the median for principal software engineering jobs in the Bay Area.

Median: $280K a year
Other jobs in the group: 224

We compare the middle of each posted range. This is base pay as posted. The group does not include this job.

Location: US - Santa Clara, CA
Work type: Onsite
Level: Principal
Posted: 23 days ago
Last check: 6 h ago
Job type: Software engineering, Inference & ML systems, ML / AI engineering

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Upscale

Open tech jobs: 24
With posted pay: 79%
Median posted base: $227K–$250K

About Upscale: funding, hiring and pay

Upscale

About Upscale: funding, hiring and pay

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The role

We are building a world-class SerDes engineering team to enable next-generation connectivity for AI data centers and high-performance computing.

What you will do

Transmitter Design Leadership: Lead the architecture, design, and implementation of high-speed SerDes transmitter circuits targeting the next-generation high-speed interconnects, with a focus on performance, power efficiency, and silicon robustness.
Clocking Architecture: Drive transmitter clock generation, distribution, and timing optimization, including multiphase clocking, phase alignment, jitter management, and clock-to-data timing.
High-Speed DAC Development: Lead the design and optimization of high-speed DACs, including time-interleaved architectures, high-speed switching networks, linearity optimization, and power-efficient implementations.
DAC Calibration: Develop and optimize calibration techniques for high-speed time-interleaved DACs, addressing timing skew, gain and offset mismatch, nonlinearities, interleaving spurs, and process-voltage-temperature variations.
Output Driver Design: Lead the design of high-speed output drivers using both current-mode and voltage-mode architectures, optimizing output swing, impedance matching, linearity, power consumption, and signal integrity.
Bandwidth Extension Techniques: Develop advanced circuit techniques using passive elements and networks—including inductive peaking, impedance shaping, and other bandwidth-extension methods—to achieve the required high-frequency performance.
Electromagnetic Analysis: Apply electromagnetic simulation and extraction tools, such as Cadence EMX, Ansys HFSS, or other EM tools, to analyze and optimize passive structures, interconnects, coupling, and high-frequency circuit behavior.
Cross-Functional Integration: Collaborate with receiver, clocking, AMS layout, package, signal integrity, and silicon validation teams to optimize end-to-end link performance.
Silicon Execution: Drive circuit simulations, design reviews, physical implementation, tape-out readiness, silicon characterization, and performance correlation to ensure successful product delivery.
Technical Mentorship: Provide technical guidance to engineers, establish design best practices, and help raise the technical bar across the SerDes transmitter organization.

Senior Principal Engineer, SerDes Transmitter

The role

Senior Principal Engineer, SerDes Transmitter

The role

What you will do

What you need

Nice to have

Accessibility & Accommodations

About Upscale

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Upscale

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