Silicon Engineer
Sine Engineering, Tampere
What you will do
- RTL design, verification, and/or virtual modeling of SoC blocks across the digital data path - including modem baseband, application engines, interconnects, and peripheral subsystems
- For design-focused engineers:
Specify and develop RTL (Verilog / SystemVerilog / VHDL), drive micro‑architecture decisions, and support synthesis, timing closure, and physical design handoff
- For verification-focused engineers:
Build testbenches and verification environments (UVM / SystemVerilog), define coverage and verification plans (including formal verification where applicable), and drive blocks to coverage closure and sign‑off
- For mixed-signal engineers:
Specify, design, implement, verify, and validate analog and mixed‑signal components for wireless communication systems and custom digital IC blocks (e.g., I/O, frequency synthesizers)
- Participate in design and code reviews, SoC bring‑up, silicon validation, and debugging across RTL, gate‑level, and post‑silicon stages