Member of Technical Staff - Formal Verification

• Degree: BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• RTL and Assertions: Strong SystemVerilog and SVA skills. You can read complex RTL, understand the microarchitecture, and write properties that accurately capture its intended behavior.
• Formal Tools: Hands-on experience with tools such as Cadence Jasper, Synopsys VC Formal, or Siemens Questa Formal. You can build verification environments, debug failed proofs, and improve proof convergence.
• Proof Techniques: Practical understanding of model checking, induction, abstraction, and assume-guarantee reasoning. You know how constraints and modeling choices affect what a proof actually establishes.
• Hardware Understanding: Comfortable reasoning about control logic, pipelines, arbitration, buffering, and interface protocols, including reset behavior, backpressure, and concurrent transactions.
• Engineering Rigor: Strong scripting skills in Python, Tcl, or similar languages. You build repeatable workflows and keep verification results traceable to requirements and design revisions.
• Ownership: Comfortable working from incomplete specifications, resolving ambiguity with designers, and making clear technical judgments under tape-out deadlines.

• Experience owning formal verification sign-off for blocks or subsystems in a shipped chip.
• Experience verifying AI accelerators, processor cores, cache coherence, memory systems, or interconnects.
• Background in simulation-based verification and UVM, with a practical understanding of how formal and simulation complement each other.
• Experience building formal verification infrastructure used across multiple projects or teams.
• Familiarity with AI-generated RTL or using verification results to guide automated design and repair.
• Experience as an early technical hire at a semiconductor or EDA startup.

• Competitive salary and meaningful equity stake
• Fast-paced startup with autonomy and visible impact
• A foundational role at the intersection of formal verification, AI, and silicon

Architect is a frontier AI lab for specialized computing systems. We partner with AI labs, clouds / neoclouds, quant firms, physical AI companies, fabless companies, IP providers, system companies and advanced fabs to tape-out custom hardware co-designed for their next-generation AI workloads. Our goal is to compress end-to-end software to silicon timelines, and maximize intelligence per watt and per dollar for the world. We are a small exceptional team across silicon, systems, software and frontier AI.

Our team has led research teams at nearly every frontier AI lab and led chip programs for some of the most complex SoCs in the world.