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Job typeSoftware engineering134ML / AI engineering28Inference & ML systems36Infra, platform & SRE9Security engineering1Product management1Design1Hardware and robotics203

LocationBay Area168New York6Remote (US)12Other places in the US138Outside the US122

LevelIntern25Entry level13Senior101Staff35Principal25Director+1

Work typeOnsite75Hybrid25Remote9

Minimum base payNo minimum$100K+112$150K+107$200K+94$250K+39$300K+15

Date postedAll datesLast 24 hours4Last 7 days40Last 30 days144

Years of experience0 to 2 years3 to 5 years6 to 9 years10 years or more

SkillsSystemVerilogPythonAWSSQLTypeScriptKubernetesGCPAzureReactDockerJavaGoC++RustTerraformPyTorchSparkPostgreSQLJavaScriptNode.jsSwiftFigmaExcel

Other filtersOnly AI and ML jobsPosted payVisa sponsorship in the job textMember of Technical StaffOnly manager jobsHide jobs that we found on LinkedIn

357 jobs from 7,733 companies, checked on their job boards 2 h ago

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SystemVerilog×Remove all filters

RTL Design Engineer, Networking / NoC
OpenAISan Francisco
- Hybrid
- Hardware and robotics
- SystemVerilog
- Verilog
$287K–$485K / yr
Posted today
Sr. System Design Engineer
MicronArzano (NA), Italy
- Senior
- Software engineering
- Python
- C++
- C
- FPGA
- SystemVerilog
- +1 more
Pay not posted
Posted today
ASIC Design Verification Engineer - Specs
SnapEindhoven - Netherlands
- Hardware and robotics
- 5+ years
- SystemVerilog
Pay not posted
Posted today

Integrated Circuit Design Verification Engineer

SnapVancouver, WA - 805 Broadway

Hardware and robotics

Python
Bash
Linux
SystemVerilog
Verilog

$173K–$259K / yr

Posted today

ON

Senior Embedded Software Engineer

Orbit Neuro Co.San Francisco

Senior
Onsite
Software engineering
5+ years

C++
FPGA
gRPC
Linux
RTOS
+3 more

$185K–$215K / yr

Posted yesterday

Security Hardware Integration Engineer

IntelIsrael, Haifa +1

Hardware and robotics
5+ years

SystemVerilog
Verilog

Pay not posted

Posted yesterday

IP Design Verification Engineer

IntelUS, California, Santa Clara +1

Hardware and robotics
1+ years

Python
SystemVerilog
Verilog
VHDL

Pay not posted

Posted yesterday

SoC Design Verification Engineer

IntelUS, California, Santa Clara +1

Hardware and robotics
0+ years
5 positions

SystemVerilog

Pay not posted

Posted yesterday

Senior ASIC Design Engineer

Palo Alto NetworksCalifornia

Senior
Hybrid
Hardware and robotics
10+ years
Visa sponsorship in the job text

Python
C++
Bash
C
SystemVerilog

Pay not posted

Posted yesterday

Sr FPGA Design Engineer (NetSec)

Palo Alto NetworksCalifornia

Senior
Onsite
Hardware and robotics
5+ years
Visa sponsorship in the job text

Python
C++
Bash
C
FPGA
+2 more

Pay not posted

Posted yesterday

SoC Digital Verification Engineer, Multimedia Lab

ByteDanceSingapore

Software engineering
3+ years

Python
Bash
FPGA
SystemVerilog

Pay not posted

SoC Digital Design Engineer, Multimedia Lab

ByteDanceSingapore

Hardware and robotics
3+ years

Python
SystemVerilog
Verilog

Pay not posted

ASIC Design Engineer Graduate (Video Silicon IP) - 2027 Start

ByteDanceSan Jose, California

Entry level
Hardware and robotics
2 positions

Python
SystemVerilog

Pay not posted

ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer

ByteDanceSan Jose, California

Intern
Hardware and robotics
2 positions

Python
SystemVerilog

Pay not posted

Synthesis & STA Engineer - Singapore

ByteDanceSingapore

Software engineering
3+ years

SystemVerilog
Verilog

Pay not posted

ASIC Design Engineer (Video Silicon IP)- Multimedia Lab

ByteDanceSan Jose, California

Hardware and robotics
2+ years

Python
C++
FPGA
SystemVerilog
Verilog

Pay not posted

Senior SoC Digital Design Engineer, Multimedia Lab

TikTokSan Jose, California

Senior
Hardware and robotics
3+ years

Python
SystemVerilog
Verilog

Pay not posted

Senior SoC Digital Verification Engineer, Multimedia Lab

TikTokSan Jose, California

Senior
Software engineering
3+ years

Python
Bash
FPGA
SystemVerilog

Pay not posted

SoC Digital Verification Engineer, Multimedia Lab

TikTokSan Jose, California

Software engineering
1+ years

Python
Bash
FPGA
SystemVerilog

Pay not posted

SoC Digital Design Engineer, Multimedia Lab

TikTokSan Jose, California

Hardware and robotics
1+ years

Python
SystemVerilog
Verilog

Pay not posted

L

Sr/Staff Digital Design Engineer

LightmatterToronto, ON +2

Staff
Hardware and robotics
5+ years

Python
Bash
SystemVerilog
Verilog

$123K–$175K / yr

Posted 3 days ago

L

Sr/Staff Digital Design Engineer

LightmatterBoston, MA +2

Staff
Hardware and robotics
5+ years

Python
Bash
SystemVerilog
Verilog

$154K–$218K / yr

Posted 3 days ago

L

Sr/Staff Digital Design Engineer

LightmatterMountain View, CA +2

Staff
Hardware and robotics
5+ years

Python
Bash
SystemVerilog
Verilog

$164K–$222K / yr

Posted 3 days ago

S

Validation and Verification Engineer, Aviation Engineering

SkyryseEl Segundo, CA

Software engineering
3+ years

Python
C++
C
FPGA
MATLAB
+3 more

$120K–$145K / yr

Posted 3 days ago

Principal FPGA Design Engineer

Advanced Micro Devices, IncSanta Clara, California

Principal
Onsite
Hardware and robotics

Python
Bash
FPGA
PCB design
SystemVerilog
+1 more

Pay not posted

Posted 4 days ago

checked 4 days ago

QC

Sr. FPGA Engineer

QuEra Computing, Inc.Boston, MA +1

Senior
Hardware and robotics
5+ years

Python
AWS
FPGA
Linux
SystemVerilog
+1 more

Pay not posted

Posted 4 days ago

Senior Digital Design Verification Engineer - Hardware

NVIDIAUS, CA, Santa Clara

Senior
Hardware and robotics
5+ years
2 positions

C++
C
SystemVerilog

Pay not posted

Posted 4 days ago

ASIC Verification Engineer

BroadcomUSA-Colorado-Fort Collins-4380 Ziegler Road +5

Hardware and robotics
8+ years
4 positions

Python
C++
C
SystemVerilog
Verilog

Pay not posted

Posted 4 days ago

ASIC Emulation & Verification Engineer

BroadcomUSA-CA San Jose Innovation Drive

Hardware and robotics
8+ years

Python
Bash
SystemVerilog
Verilog

Pay not posted

Posted 4 days ago

SoC Validation Engineer – Power Management

IntelUS, California, Folsom +2

Software engineering
10+ years

Python
SystemVerilog

Pay not posted

Posted 4 days ago

Verification Engineer, PCIE

NVIDIAIndia, Bengaluru

Software engineering
1+ years
6 positions

SystemVerilog
Verilog

Pay not posted

Posted 4 days ago

VLSI CAD Engineer

AppleCupertino, California

Onsite
Hardware and robotics
2+ years

SystemVerilog
Verilog

$154K–$225K / yr

Posted 5 days ago

checked 4 days ago

Principal Formal Verification Engineer

Astera LabsBengaluru, Karnataka, India +1

Principal
Software engineering
10+ years

Python
SystemVerilog

Pay not posted

Posted 5 days ago

R&D Engineer, IC Design

BroadcomUSA-CA Irvine Alton Parkway Bldg 2 +2

Hardware and robotics
2+ years
7 positions

Python
Jira
Linux
SystemVerilog
Verilog

Pay not posted

Posted 5 days ago

A

Mixed-signal IC Design Engineer

AragoParis Offices +1

Onsite
Hardware and robotics

SystemVerilog
Verilog

Pay not posted

Posted 6 days ago

Senior ASIC Silicon Validation Engineer (NetSec)

Palo Alto NetworksCalifornia

Senior
Onsite
Hardware and robotics
5+ years
Visa sponsorship in the job text

Python
C
SystemVerilog

Pay not posted

Posted 6 days ago

Senior Design Verification Engineer

MicronMinneapolis, MN +1

Senior
Hardware and robotics
6+ years
2 positions

SystemVerilog

Pay not posted

Posted 6 days ago

Senior Staff Digital Design Engineer

MarvellIrvine, CA

Staff
Hardware and robotics
5+ years
2 positions

FPGA
SystemVerilog

Pay not posted

Posted 6 days ago

Staff Engineer- DFT

MarvellSanta Clara, CA +1

Staff
Hardware and robotics
5+ years
2 positions

Python
SystemVerilog
Verilog

Pay not posted

Posted 6 days ago

RTL integration Engineer

BroadcomUSA-CA San Jose Innovation Drive

Hardware and robotics
8+ years

SystemVerilog

Pay not posted

Posted 6 days ago

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