Senior FPGA Reverse Engineer

STR’s Cyber Division is hiring a Senior FPGA Reverse Engineer who will leverage their digital hardware design background to work within a multi-disciplinary team solving unique problems surrounding FPGA reverse engineering.

We are seeking a candidate to execute FPGA reverse engineering tasks and support software development to improve and automate the process. A key responsibility will be netlist analysis, which involves studying gate-level layouts of FPGA applications to craft a behavioral understanding of the design through a combination of logic circuit analysis and characterization through register transfer level (RTL) simulations. Candidates will also support efforts in operationalizing emerging hardware reverse engineering capabilities to better enable gate-level netlist analysis.