- Gain deep experience applying formal verification to high-performance, out-of-order RISC-V CPU designs.
- Learn how to identify which hardware behaviors are best verified through formal methods versus simulation, emulation, and other DV techniques.
- Develop expertise in writing scalable properties and proofs for complex control logic and interacting microarchitectural blocks.
- Learn how architectural intent translates into formal properties, assumptions, and measurable verification goals.
- Work alongside world-class CPU architects and RTL engineers on next-generation processors for AI, HPC, and high-performance computing.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S.
As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.