Senior IC Layout design Engineer
Advanced Micro Devices, Inc, San Jose, California
The role
The AMD SerDes Technology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an experience analog/mixed-signal layout design engineer with supervisory role to join our world-class team in the development of SerDes solutions to facilitate the future connectivity of AMD CPU and GPU products. THE PERSON: You have a passion for high speed layout design with innovative and creative ideas to solve complex design challenges.
You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Layout design of high speed and high performance SerDes analog mixed signal circuit in accordance to project requirements and specifications. Block level physical implementation which includes floor-planning, power distribution network, clock and signal routing, analog and mixed signal transistor level layout.