LVS Runset Development Engineer
Intel, India, Bangalore
The role
"We are looking for a LVS Runset Development Engineer to develop and Validate LVS rule decks. The role involves working closely with PDK Team and foundry to implement LVS runsets and ensure design compliance. Key Responsibilities:
- Rule Development: Development and QA support of LVS/extraction runset for Intel's process.
- Multi-Tool Integration: Develop and optimize verification flows across multiple EDA environments, ensuring consistency in results between ICV, Calibre and Pegasus tools.
- Cross-Functional Collaboration: Work closely with Device Physicists, Process Integration Engineers, and Analog Designers.
- Debug and Analysis: Provide expert-level support to design teams in debugging LVS issues.
- Automation: Develop scripts (Python, SKILL, Tcl, or Perl) to automate the execution, reporting, and tracking across different design versions.
- Documentation: Maintain detailed documentation and create guidelines for designers to implement correct-by-construction layouts.