R&D Engineer IC Design 5

This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, creating comprehensive test plans, and verifying high-performance network switch ASIC/FPGAs. The role involves hands-on implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams. The ideal candidate will have a proven track record of completing multiple successful ASIC design and verification cycles—from architecting testbenches (networking background preferred) to achieving full verification closure.