Sr Staff Engineer-DFT
Marvell, Santa Clara, CA
What you need
- BS in EE/CE with 8+ years or MS in EE/CE with 5+ years of DFT experience on complex SoCs, with multiple tape-outs and silicon bring-ups
- Deep expertise in scan, compression, ATPG fault models, MBIST/repair, JTAG, and at-speed test.
- Strong DFT timing/STA knowledge; experience with advanced nodes (7nm and below preferred).
- Proven independent problem solving and mentoring.
- Experience with high-speed SerDes/DSP products is a plus.
Expected Base Pay Range (USD) 134,390 – 201,300, $ per annum
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.
 Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.