- Bachelor’s or Master’s, degree in Electrical Engineering, Computer Engineering, or a related field.
- 4+ years of progressive experience in back-end physical design and verification.
- Good understanding of RTL to GDS flows and methodology.
- Expertise in full-chip & sub-hierarchy integration.
- Experience integrating and taping out large designs utilizing a digital design environment.
- Good scripting skills in Perl, tcl and Python.
- Team player with good communication skills
- Experience with multi-voltage and low-power design techniques is a plus.
- Experience with Cadence Genus and Innovus is preferred.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.
 Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.