ASIC Design - Principal Engineer

Upscale, US - Santa Clara, CA

What you will do

As a member of the ASIC Design team, you will work closely with the architecture team and define and document micro-architecture on next generation designs.
Responsible for the logic design/RTL entry that meets the power, performance, area targets.
Collaborate closely with design verification and emulation teams to confirm that test plans meet architecture and design intent, debug complex test scenarios and coverage closure
Work closely with the physical design team on timing closure and area optimization
Work with the design for test team to integrate DFT logic
Work independently, communicate effectively and collaborate with cross functional teams

Upscale, US - Santa Clara, CA

$250K–$265K

a year

This base pay is above the median for principal hardware and robotics jobs in the Bay Area.

We compare the middle of each posted range. This is base pay as posted. The group does not include this job.

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As a member of the ASIC Design team, you will work closely with the architecture team and define and document micro-architecture on next generation designs.
Responsible for the logic design/RTL entry that meets the power, performance, area targets.
Collaborate closely with design verification and emulation teams to confirm that test plans meet architecture and design intent, debug complex test scenarios and coverage closure
Work closely with the physical design team on timing closure and area optimization
Work with the design for test team to integrate DFT logic
Work independently, communicate effectively and collaborate with cross functional teams