Hardware Design Engineering, Director - OEM, Silicon Validation Platforms & Rack-Scale Design - Taiwan

Astera Labs, Taipei, Taiwan +1

The role

We are hiring a Director of Hardware Design Engineering — OEM, Silicon Validation Platforms & Rack-Scale Design to establish and lead Astera Labs' Taiwan hardware engineering center. This role serves as the primary hardware engineering hub for OEM customer engagement across Asia, while simultaneously owning the design and development of Silicon Validation Platforms (SVB/EVB) and rack-scale products (AI chassis, switch trays, CEM cards).

What you need

OEM Design Enablement & Customer Engagement

Customer Design Support:
Serve as the primary hardware engineering interface for OEM customers in Asia who are designing Astera Labs silicon (retimers, re-drivers, connectivity ASICs) into their own products
Provide expert-level design review support for customer hardware designs — reviewing schematics, PCB layouts, stackups, power delivery networks, thermal solutions, and signal integrity
Deliver hands-on technical engagement during customer design cycles — from initial architecture consultation through prototype bring-up, debug, and production readiness
Support customer hardware debug and troubleshooting when integration challenges arise — coordinating across internal teams (silicon, firmware, SI, validation) to provide rapid root-cause analysis and corrective guidance
Travel to customer sites across Asia (Taiwan, China, Japan, Korea) to provide on-site design review, bring-up support, and integration assistance for critical programs
Reference Design & Design Collateral Development:
Develop and maintain production-quality reference designs for Astera Labs silicon — including reference schematics, recommended PCB layouts, stackup guidelines, power delivery reference circuits, and thermal design examples
Create comprehensive hardware design guides, integration manuals, application notes, and best-practice documentation that enable OEM customers to achieve first-pass success
Develop design review checklists and self-assessment tools for OEM customers, supplemented by Astera Labs expert review at critical milestones
Ensure reference designs and collateral evolve with each silicon generation and incorporate lessons learned from customer engagements
OEM Relationship Management:
Build deep, trust-based technical relationships with hardware engineering teams at key OEM customers — becoming their preferred technical partner for Astera Labs silicon integration
Partner with Sales, FAE, and Product Management teams to identify high-value customer engagements and prioritize hardware engineering support resources
Participate in customer roadmap discussions, providing hardware engineering perspective on future silicon requirements, package options, and platform integration considerations
Capture common customer design challenges, failure modes, and feature requests — feeding these back into reference designs, design guides, evaluation platforms, and silicon requirements
Support joint development programs with strategic OEM partners — including co-designed products, custom form factors, and platform-specific optimizations

Silicon Validation Platform Design (SVB/EVB)

Platform Architecture & Design:
Own the architecture, design, and delivery of Silicon Validation Boards (SVB) and Evaluation Boards (EVB) for all Astera Labs silicon products — retimers, re-drivers, PCIe/CXL switches, and connectivity ASICs
Design complex multi-layer PCBs optimized for silicon bring-up, characterization, and performance demonstration — including high-speed channel routing, configurable topology options, comprehensive power delivery, and debug/instrumentation access
Ensure evaluation platforms provide optimal silicon exercising capability — enabling full characterization of all silicon features, performance modes, and operational corners
Design platforms that serve dual purposes: internal silicon validation and external customer evaluation/demonstration
Create modular, scalable platform architectures that can be efficiently adapted across silicon generations with minimal redesign
Silicon Bring-Up & Characterization Support:
Partner with silicon design and validation teams to ensure SVB/EVB designs support all required bring-up sequences, test modes, and characterization scenarios
Support initial silicon bring-up activities on new platforms — providing hardware debug expertise and rapid board-level modifications as needed
Ensure platform designs enable comprehensive performance characterization — including high-speed link testing, power measurement, thermal characterization, and margin analysis
Design instrumentation access (probe points, headers, measurement interfaces) that enables efficient silicon debug without compromising signal integrity
Customer Evaluation Enablement:
Design evaluation platforms that provide customers a compelling, easy-to-use experience for evaluating Astera Labs silicon in their target applications
Include customer-relevant interfaces, connectors, and configurations that match real deployment scenarios (OSFP, QSFP-DD, PCIe/CXL slots, network interfaces)
Develop evaluation platform documentation including user guides, quick-start instructions, test procedures, and application examples
Support customer evaluation activities – providing technical guidance, interpreting results, and facilitating customer design-in decisions

Hardware Design Engineering, Director - OEM, Silicon Validation Platforms & Rack-Scale Design - Taiwan

The role

What you need

Hardware Design Engineering, Director - OEM, Silicon Validation Platforms & Rack-Scale Design - Taiwan

The role

What you need

Nice to have

This is a high-impact leadership role that combines three critical functions

Taiwan Engineering Center Leadership

OEM Design Enablement & Customer Engagement

Silicon Validation Platform Design (SVB/EVB)

Rack-Scale Product Design

Hardware Validation (Platform & Rack-Scale)

Cross-Functional Collaboration

Lab Infrastructure (Taiwan)

About Astera Labs

Similar jobs at other companies

Hardware Design Engineer Intern

Hardware Electrical Validation Intern

AMS Digital Design Engineer NCG

Director - Hardware Engineering, AI Infrastructure Systems

Firmware Engineer (Internship) - Vancouver

Design Engineering Intern (CCE2)

Interview questions

Astera Labs