System Validation Engineer
Astera Labs, Haifa District, Israel +2
The role
We are looking for a Post-Silicon Validation Engineer with strong hands-on experience in PCIe link bring-up, physical-layer debug, and silicon validation. Engineer will work closely with Design, Architecture, Firmware, Software, Engineering teams.
What you will do
- Perform hands-on post-silicon validation
- Debug PCIe link issues including link training, LTSSM, equalization, recovery, resets, and link stability.
- Analyze PCIe state-machine traces, protocol traces, registers, logs, eye diagrams, and lab measurements.
- Drive complex issues from initial failure through root-cause analysis and final resolution.
- Work closely with silicon, firmware, software, architecture, and signal-integrity engineers to isolate issues across HW/FW/SW boundaries.
- Validate PCIe functionality across different generations, platforms, configurations, and operating conditions.
- Develop and execute PCIe validation plans, stress tests, corner-case scenarios, and interoperability tests.