Chip Design Engineer
Ricursive Intelligence, Palo Alto
The role
We are hiring an engineer who deeply understands every step of the flow, from synthesis through tapeout, and who has personally fought complex blocks to closure at an advanced node. Your expertise will be used to define and implement the design of self-improving systems that you will then use to build real silicon.
What you will do
- Own designs for synthesis, DFT insertion, floorplanning, PDN design, placement, CTS, routing, and all electrical, timing, and physical signoff.
- Own timing, power, and physical closure of the most complex, PPA-critical blocks in advanced nodes, driving multi-mode multi-corner timing convergence, EM/IR signoff, and DRC/LVS closure through final ECOs and tapeout.
- Own chip design infrastructure and automation, optimization techniques and goals, and design improvement strategies.