Package Layout Engineer
DensityAI, Mountain View, CA +1
The role
Own the physical layout of the advanced packages our AI accelerator silicon ships in. You'll take multi-die 2.5D and 3D packages from bump map through tapeout release — defining substrate and interposer stackups, planning bump and ball maps against the die floorplan, routing high-density escape and HBM-class channels, and building the power delivery that feeds hundreds of amps into the accelerator. You'll sit between the die and the board, co-designing with physical design on one side and PCB layout on the other, and you'll own the design release our substrate suppliers and OSATs build from.
When the package is the thing standing between silicon and a working system, this is the role that closes it.
What you will do
- Own package substrate and interposer layout end to end; stackup definition, bump and ball map planning, RDL and escape routing, and design release to substrate suppliers and OSATs