Lead STA Engineer
Broadcom, IND-Pune EON Kharadi Infrastructure
The role
In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet rigorous criteria for achieving Right-First-Time silicon. The STA Engineer is responsible for ensuring robust timing closure and signoff readiness for block- and full-chip designs across all modes and corners. This role owns timing constraint development and validation, performs detailed setup/hold and variation-aware analysis, and partners closely with Synthesis, CTS, Physical Design, and Design teams to debug violations and drive ECO-based optimizations through tape out.
What you will do
- Perform full-chip and block-level Static Timing Analysis (STA) across all modes and corners.