- M.S or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering or related field.
- 3+ years of proven experience.
- Individual should be proficient in Verilog and/or VHDL, C/C++ and SystemVerilog.
- Experience with UVM verification environments and scripting with Perl, Python and C/C++ is essential.
- Be familiar with hierarchical design approach, top-down design, SoC and system level verification.
- This role is based on-site at our Santa Clara, CA office
Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are: 168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.