RTL Design Engineer

What you will do

Design and implement RTL for complex digital subsystems using Verilog/SystemVerilog
Translate architectural specifications into clean, efficient, and scalable microarchitectures
Collaborate with architecture, verification, and physical design teams to ensure design correctness and closure
Develop high-quality, reusable RTL with strong coding standards and documentation
Perform linting, CDC analysis, and ensure synthesis readiness of designs
Support integration and debug of RTL in simulation and early silicon environments

$160K–$240K

a year

This base pay is above the median for hardware and robotics jobs in the US with no level in the job title.

We compare the middle of each posted range. This is base pay as posted. The group does not include this job.

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Design and implement RTL for complex digital subsystems using Verilog/SystemVerilog
Translate architectural specifications into clean, efficient, and scalable microarchitectures
Collaborate with architecture, verification, and physical design teams to ensure design correctness and closure
Develop high-quality, reusable RTL with strong coding standards and documentation
Perform linting, CDC analysis, and ensure synthesis readiness of designs
Support integration and debug of RTL in simulation and early silicon environments