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Examples: Remote senior ML jobs that pay $200K or more New graduate software jobs in New York with visa sponsorship Data engineer jobs in Bengaluru that use Spark

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Job typeSoftware engineering164ML / AI engineering26Inference & ML systems40Infra, platform & SRE11Security engineering1Product management1Design1Hardware and robotics350

LocationBay Area228New York15Remote (US)23Other places in the US207Outside the US187India66Bengaluru54Hyderabad9Pune3Chennai1Remote (India)3

LevelIntern43Entry level19Senior150Staff50Principal40Director+1

Work typeOnsite104Hybrid50Remote12

Minimum base payNo minimum$100K+264$150K+252$200K+208$250K+116$300K+44

Date postedAll datesLast 24 hours0Last 7 days34Last 30 days197

Years of experience0 to 2 years3 to 5 years6 to 9 years10 years or more

SkillsSystemVerilogPythonAWSSQLTypeScriptKubernetesGCPAzureReactDockerJavaGoC++RustTerraformPyTorchSparkPostgreSQLJavaScriptNode.jsSwiftFigmaExcel

Other filtersOnly AI and ML jobsPosted payVisa sponsorship in the job textMember of Technical StaffOnly manager jobsHide jobs that we found on LinkedIn

536 jobs from 7,835 companies, checked on their job boards 5 h ago

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DS
Engineering Manager (Embedded)
Distributed SpectrumNew York City
- Onsite
- Software engineering
- Manager
- Go
- Rust
- FPGA
- Linux
- SystemVerilog
$200K–$300K / yr
Posted Oct 6, 2026
CR
SMTS Verification Engineering
Careers RambusHillsboro, OR
- Software engineering
- 3+ years
- Python
- SystemVerilog
- Verilog
$100K–$186K / yr
Posted Oct 6, 2026
checked 2 days ago
RL
CPU Design Verification Engineer - Intern
Rosaic LabsSanta Clara, CA +1
- Intern
- Onsite
- Hardware and robotics

Python
C++
C
SystemVerilog

$30–$55 / hr

Posted Oct 5, 2026

RL

AI Accelerator Design Verification Engineer - Intern

Rosaic LabsSanta Clara, CA +1

Intern
Onsite
Hardware and robotics

Python
C++
C
SystemVerilog

$30–$55 / hr

Posted Oct 5, 2026

RL

AI Accelerator Design Verification Engineer - Full Time

Rosaic LabsSanta Clara, CA +4

Hybrid
Hardware and robotics

Python
C++
Rust
PyTorch
C
+4 more

$125K–$250K / yr

Posted Oct 5, 2026

RL

CPU Design Verification Engineer - Full Time

Rosaic LabsSanta Clara, CA +2

Hybrid
Hardware and robotics

Python
C++
Rust
C
FPGA
+1 more

$125K–$250K / yr

Posted Oct 5, 2026

Formal Verification Engineer

TenstorrentSanta Clara, California +2

Software engineering
6+ years

Python
C++
C
SystemVerilog

Pay not posted

Posted Oct 5, 2026

ASIC Engineer, Formal Verification

MetaBengaluru, Karnataka, India

Onsite
Hardware and robotics
2+ years

Python
SystemVerilog

Pay not posted

Posted Oct 5, 2026

checked 5 days ago

Research Intern (PhD), FPGA & Silicon Prototyping

MarvellHyderabad

Intern
Hardware and robotics

Python
C++
C
FPGA
SystemVerilog
+2 more

Pay not posted

Posted Oct 4, 2026

checked 2 days ago

Sr. RF Silicon Software Engineer (RFIC Engineering)

SpaceXRedmond, WA

Senior
Software engineering
5+ years

Python
C++
C
FPGA
PCB design
+1 more

$165K–$270K / yr

Posted Oct 1, 2026

Principal Engineer, PHY/MAC Design (P)

InnoPhase IoTSan Jose, California +1

Principal
Software engineering
10+ years

FPGA
SystemVerilog
Verilog

$216K–$220K / yr

Posted Oct 1, 2026

Staff DFx Methodology Architect

Advanced Micro Devices, IncSan Jose, California

Staff
Hybrid
Software engineering

Python
SystemVerilog
Verilog

Pay not posted

Posted Oct 1, 2026

checked 2 days ago

FE Engineering

AppleCupertino, California

Onsite
Software engineering
1+ years

C++
C
FPGA
MATLAB
SystemVerilog
+2 more

$174K–$225K / yr

Posted Oct 1, 2026

checked 9 days ago

CC

Graduate Electronics & Software Engineer (2027 start)

Cambridge ConsultantsUnited Kingdom

Entry level
Software engineering

C++
Rust
C
FPGA
PCB design
+3 more

Pay not posted

Posted Oct 1, 2026

AM

DFT Intern

Ambiq Micro, Inc.Singapore

Intern
Hardware and robotics

Python
Linux
SystemVerilog
Verilog
VHDL

Pay not posted

Posted Oct 1, 2026

CG

Senior FPGA Engineer (New Hire Sign-On Bonus Eligible)

Careers GdmsBloomington, MN

Senior
Hardware and robotics
8+ years

FPGA
SystemVerilog

$160K–$169K / yr

Posted Oct 1, 2026

checked 2 days ago

FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceXIrvine, CA +1

Hardware and robotics
1+ years

Python
C++
Bash
C
FPGA
+4 more

$125K–$195K / yr

Posted Sep 30, 2026

FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceXRedmond, WA +1

Hardware and robotics
1+ years

Python
C++
Bash
C
FPGA
+4 more

$125K–$200K / yr

Posted Sep 30, 2026

Senior Digital IC Engineer — RTL Design & Verification

Visibl SemiconductorsRemote (US)

Senior
Remote
Hardware and robotics

FPGA
SystemVerilog

$180K–$250K / yr

Posted Sep 30, 2026

checked 2 days ago

RF Silicon Software Engineer (RFIC Engineering)

SpaceXRedmond, WA

Software engineering
1+ years

Python
C++
C
FPGA
PCB design
+1 more

$125K–$200K / yr

Posted Sep 30, 2026

N

CPU Design & Verification Engineer — New College Grad

NuvacoreAustin, TX +2

Entry level
Hybrid
Software engineering

Python
C++
C
FPGA
SystemVerilog
+1 more

$140K–$200K / yr

Posted Sep 30, 2026

Silicon Emulation Engineer

WaymoTaipei, Taiwan +3

Hardware and robotics
5+ years

Python
C++
SystemVerilog

TWD 2600K–TWD 2990K / yr

Posted Sep 30, 2026

Member Of Technical Staff TLP - HBM Verification

MicronHyderabad - Phoenix Aquila, India

Software engineering
Member of Technical Staff
12+ years

Python
SystemVerilog

Pay not posted

Posted Sep 30, 2026

checked 3 days ago

Interface Design Architect, HBM - DMTS

MicronRichardson, TX

Software engineering
18+ years

SystemVerilog
Verilog

Pay not posted

Posted Sep 30, 2026

checked 3 days ago

Senior FPGA Reverse Engineer

STRWoburn, MA +1

Senior
Hardware and robotics
5+ years

Python
C++
C
FPGA
MATLAB
+4 more

$138K–$189K / yr

Posted Sep 29, 2026

Principal Verification Engineer

Astera LabsSan Jose, California +1

Principal
Software engineering
8+ years
2 positions

SystemVerilog

$185K–$230K / yr

Posted Sep 29, 2026

RL

CPU RTL Microarchitecture/Design Engineer - Full Time

Rosaic LabsSanta Clara, CA +1

Hybrid
Hardware and robotics

Python
C++
C
SystemVerilog
Verilog

$125K–$250K / yr

Posted Sep 29, 2026

Design Lead (HBM/Advanced Memory Design)

MicronRichardson, TX

Senior
Design
20+ years
3 positions

SystemVerilog
Verilog

Pay not posted

Posted Sep 29, 2026

checked 4 days ago

New College Grad - HBM SoC Design Engineer/Architect

MicronFolsom, CA +1

Entry level
Hardware and robotics

FPGA
SystemVerilog
Verilog
VHDL

$79K–$175K / yr

Posted Sep 29, 2026

checked 4 days ago

Senior Design Verification Engineer

Astera LabsSan Jose, California +1

Senior
Hardware and robotics
2+ years
2 positions

Python
SystemVerilog

$149K–$165K / yr

Posted Sep 28, 2026

System Modeling Design Engineer

Advanced Micro Devices, IncSan Jose, California

Hybrid
Software engineering

Python
SystemVerilog

Pay not posted

Posted Sep 28, 2026

Verification Engineer

IMCChicago

Software engineering
3+ years

C++
Linux
SystemVerilog
Verilog

$175K–$225K / yr

Posted Sep 25, 2026

Lead IP Verification Engineer

Advanced Micro Devices, IncSan Jose, California

Senior
Hybrid
Software engineering

Python
FPGA
SystemVerilog
Verilog

Pay not posted

Posted Sep 24, 2026

FPGA Intern (Winter 2027)

AstranisSan Francisco, California +1

Intern
Hardware and robotics
2 positions

FPGA
SystemVerilog
Verilog

$29 / hr

Posted Sep 24, 2026

checked 2 days ago

FPGA Intern (Summer 2027)

AstranisSan Francisco, California +1

Intern
Hardware and robotics
2 positions

FPGA
SystemVerilog
Verilog

$29 / hr

Posted Sep 24, 2026

checked 2 days ago

Hardware Machine Learning PhD Research Internship

IMCChicago

Intern
Hardware and robotics

Python
PyTorch
FPGA
SystemVerilog
TensorFlow
+1 more

Pay not posted

Posted Sep 23, 2026

DD

DFT Engineer

Delos Data IncPalo Alto

Remote
Hardware and robotics
5+ years

Python
SystemVerilog

$160K–$260K / yr

Posted Sep 23, 2026

C

FPGA Verification Engineer II

CesiumAstroAustin, TX

Onsite
Hardware and robotics
2+ years

Python
C++
C
FPGA
Linux
+4 more

Pay not posted

Posted Sep 23, 2026

C

FPGA Verification Engineer II

CesiumAstroWestminster, CO

Onsite
Hardware and robotics
2+ years
2 positions

Python
C++
C
FPGA
Linux
+4 more

$113K–$136K / yr

Posted Sep 23, 2026

PT

Senior or Staff Design Verification Engineer

Powerlattice Technologies Inc.HQ - Vancouver, WA +1

Staff
Hybrid
Hardware and robotics
10+ years

Python
Bash
Linux
SystemVerilog
Verilog

$160K–$190K / yr

Posted Sep 23, 2026

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